I am currently in my first year of MSc in Computer Engineering at Delft University of Technology (TU Delft), Netherlands.
Prior to joining TU Delft, I had worked as a research associate, at Waran Research Foundation (WARFT) [www.warftindia.org] as a member of their High Performance Computing group and was involved in Micro-architecture level design and HDL simulation for the MIP SCOC (Memory in Processor Super Computer on a Chip).
I had also worked part-time, as a research trainee from Aug ‘04 to Aug ‘06, in a 2 year research training program at WARFT. As a member of the High Performance Computer Architecture group at WARFT, I was involved in Micro-architecture and cell-based design of the MIP SCOC (Memory in Processor Super Computer on a Chip).
